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  20 stern ave. springfield, new jersey 07081 u.s.a. high-speed analog n-channel dmos fets sd210/sd212/sd214 features ? high input to output isolation 120db ? low on resistance 30 ohm ? low feedthrough and feedback transients ? low capacitance: - input (gate) 2.4pf typ. - output 1.3pf typ. - feedback 0.3pf typ. ? no protection diode from gate to substrate for very high impedance applications ? maximum gate voltage +40v applications sd210: ? analog switch driver sd212 and sd214: ? analog switches ? high-speed digital switches ? multiplexers ? a to d converters ? d to a converters ? choppers ? sample & hold description sd210 is a 30v analog switch driver without a built-in protection diode from gate to substrate for use with sd212 and sd214 dmos analog switches. ordering information part package temperature range SD210E hermetic to-72 package xss210 sorted chips in carriers sd212de hermetic to-72 package xsd212 sorted chips in carriers sd214de hermetic to-72 package xsd214 sorted chips in carriers -55cto+125c -55cto+125c -55cto+125c -55cto+125c -55cto+125c -55cto+125c schematic diagram (top view) source drain gate body is internally connected to the case to-72 cd1-2 quality semi-conductors
sd210/sd212/sd214 absolute maximum ratings drain current 50ma total device dissipation at 25c case temperature ... 1.2w storage temperatue range -65c to +200c lead temperature (1/16" from case for 10 sec.) 300c operating temperature range -55c to +125c vds vsd vdb vsb vgs vgb vgd parameter drain-to-source source-to-drain drain-to-body source-to-body gate-to-source gate-to-body gate-to-drain sd210 +30 +10 +30 +15 40 40 40 sd212 +10 +10 +15 +15 +40 +40 40 sd214 +20 +20 +25 +25 40 40 40 unit vdc vdc vdc vdc vdc vdc vdc dc characteristics (ta = 25c, unless otherwise specified) symbol parameter sd210 min typ max sd212 min typ max sd214 min typ max units test conditions breakdown voltage bvos bvso bvdb bvss drain-to-source source-to drain drain-to-body source-to-body 30 10 10 15 15 35 25 10 10 15 15 25 20 20 25 25 25 v vgs = vbs = ov, lo = 10na vgs = vbs = -5v, is = 1 0na vgd = vbd = -5v, lo = 10na vgb = 0v, source open, id = 1 0na vgb = 0v, drain open, is = 10na leakage current ids (off) iso(off) igbs vt ros(on) drain-to-source source-to-drain gate threshold voltage drain-to-source resistance 0.5 1 1 1.0 50 30 23 19 17 10 10 0.1 2.0 70 45 0.1 1 1 1.0 50 30 23 19 17 10 10 0.1 2.0 70 45 0.1 1 1 1.0 50 30 23 19 17 10 10 0.1 2.0 70 45 na v q vgs = vbs = -5v,vds = +10v vgs = vbs = -5v, vds = +20v vgs = vbd = -5v, vsd = +1 0v vgs = vbd = -5v, vsd = +20v vdb = vsb = 0v, vgs = 40v vds = vgs = vt, is = 1 na, vsb = 0v id = 1 .oma, vsb = 0, vgs = +5v id = 1.0ma, vsb = 0, vgs = +10v id = 1.0ma, vsb = 0, vgs = +15v id = 1 .oma, vsb = 0, vgs = +20v id = 1 .oma, vsb = 0, vgs = +25v ac electrical characteristics symbol gfs parameter forward transconductance sd210 min 10 typ 15 max sd212 min 10 typ 15 max sd214 min 10 typ 15 max units ms test conditions vds = 1 0v, vsb = 0v, id = 20ma, f = 1khz small signal capacitances c(gs+gd+gb) c(gd+db) c(gs+sb) cog gate node drain node ? source node reverse transfer 2.4 1.3 3.5 0.3 3.5 1.5 5.5 0.5 2.4 1.3 3.5 0.3 3.5 1.5 5.5 0.5 2.4 1.3 3.5 0.3 3.5 1.5 5.5 0.5 pf vds = 10v, f = 1mhz vgs = vbs = -1 5v


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